Chp 5, 6.2.8, 7.4.  12.2, 13.1.2

I. CMP Instruction
	A.	Used to compare integers and characters
	B.	Floating point values are compared differently	
	C.	CMP destination, source
	D.	This creates an implied subtraction of the source from a destination.
	E.	Flags are set based on this subtraction.
	F.	Results -> ZF -> CF (Unsigned Operations)
		Dest < source -> 0 -> 1
		Dest > source -> 0 -> 0	
		Dest = source -> 1 -> 0
	G.	Results -> Flags (Signed)
		Destination < source -> SF=/=OF
		Destination > source -> SF=OF
		Destination = source -> ZF=1
	H.	Useful tool for conditional logic structure, often followed by jump
II.	Multiplication and Division
	A.	Integer multiplication in x86 can be 32-bit, 16-bit, or 8-bit
	B.	MUL Instruction
		1.	3 versions: 8-bit operand by AL register, 16 bit operand by AX 			register, 32 bit operand by EAX register	
		2.	Multiplier and multiplicand must be same size, product is twice the 			size
		3.	For 8 bit, AL is multiplicand and AX is product
		4.	For 16 bit, AX is multiplicand and DX:AX is product
		5.	For 32 bit, EAX is multiplicand and EDX:EAX is product
		6.	Destination is always twice the size of multiplier and multiplicand 			to prevent overflow.
		7.	Carry and overflow set if upper half is not equal to zero
	C.	IMUL Instruction
		1.	This is signed integer multiplication
		2.	Highest bit of lower half of product is put in upper bits of product.  
		3.	There can be one, two, or three operands for this instruction
		4.	One operand: 
			a.	Product stored in AX, DX:AX, or EDX:EAX.  
			b.	e.	IMUL reg/mem 8
					IMUL reg/mem 16
					IMUL reg/mem32
		5.	Two operand: 
			a.	Product stored in first operand (must be register).  				b.	Second operand can be register, memory, or anything
			c.	Product truncated to length of destination
			d.	If significant figures lost, overflow and carry are set
			e.	IMUL reg16, reg/mem16
				IMUL reg16, imm8
				IMUL reg 16, imm16
				IMUL reg 32, reg/mem32
				IMUL reg 32, imm8
				IMUL reg\32, imm8
		6.	Three Operands
			a.	Product stored in first operand 
			b.	Second operand can be 16 bit register or memory operand, 				multiplied by third operand, 8 or 16 bit immediate value
			c.	32 bit register or operand can be multiplied by 8 or 32 bit 				value
			d.	If digits are lost overflow and carry are set
			e.	IMUL reg16,reg/mem16,imm8
				IMUL reg16,reg/mem16,imm16
				IMUL reg32,reg/mem32,imm8
				IMUL reg32,reg/mem32,imm32
		7.	Unsigned Multiplication
			a.	Two and three operand can be used for unsigned also			b.	Lower half of product is same for signed or unsigned
			c.	Carry and overflow can't be used to indicate if upper half is 				zero
	D.	Measuring Program Execution Times
		1.	Time to execute code known with GetMseconds procedure
		2.	Function called at beginning and end, difference is calculated
	E.	MUL and IMUL vs. Bit Shifting
		1.	MUL is 241% slower than bit shifting on 4-Ghz Pentium 4
		2.	On Intel Duo-core, processing was same
		3.	Intel has optimized MUL and IMUL functions
	F.	DIV Instruction
		1.	8, 16, and 32 bit unsigned integer division
		2.	Dividend -> Divisor -> Quotient -> Remainder
			AX -> reg/mem8 -> AL -> AH
			DX:AX -> reg/mem16 -> AX -> DX
			EDX:EAX -> reg/mem32 -> EAX -> EDX
	G.	Signed Integer Division
		1.	Dividend must be fully sign extended before division occurs
		2.	Sign Extension Instructions: Dividends for signed integer division 			instructions must be sign extended.
		3.	The IDIV Instruction
			a.	Signed integer division with same operands as DIV
			b.	For 8 bit division, dividend must be sign-extended
			c.	Divide Overflow: If quotient does not fit into destination 				operand, divide overflow occurs.  
	H.	Implementing Arithmetic Expressions: Assembly source code for C++ 		arithmetic expressions can be viewed in Visual C++ 
III.	Floating-Point Unit
	A.	Graphics and calculation intensive software requires floating point 		calculations.
	B.	FPU Register Stack	
		1.	Register Stack is separate from general purpose registers
		2.	Mathematical expressions evaluated in postfix format.
		3.	Expression stack holds intermediate values during evaluation of 			postfix expressions
	C.	FPU Data Registers
		1.	FPU has 8 individually addressable 80-bit data registers R0-R7 			called register stack
		2.	TOP bit field used in FPU status word to give top of stack.
		3.	Push decrements TOP by 2 and copies operand into register
		4.	Pop operation copies data at ST(0) into operand, adds 1 to TOP.
		5.	If loading value to stack would overwrite existing data, a floating 			point exception occurs.
		6.	Floating point value in registers use 10 byte extended real format.
		7.	When stored n memory, it is translated into integer, long nteger, 			single precision, double precision, or packed binary coded 				decimal.
		8.	Special Purpose Registers
			a.	Opcode Opcode of last noncontrol instruction 						executed
			b.	Control: Controls precion and rounding method used by 				FPU 
			c.	Status: Contrans top of stack pointer, etc
			d.	Tag: Contents of each register in FP data register stack.  2 				bits per register to indicate, number, zero, special value, or 				empty
			e.	Last instruction pointer: Stores pointer to last noncontrol 				instruction
			f.	Last data pointer: Pointer to data operand used by last 				instruction
			g.	Used by operating systems to preserve state information 				when switching between tasks